The present invention relates to a semiconductor device including a capacitance portion composed of two conductive layers and a capacitance insulating film interposed therebetween, and also relates to a manufacturing method thereof.
Examples of conventionally known semiconductor devices including a capacitance portion, composed of two conductive layers and a capacitance insulating film interposed therebetween, in the semiconductor element thereof, include: a MOS transistor including a capacitance portion composed of a semiconductor substrate, a gate electrode and a gate insulating film; a dynamic RAM (Random Access Memory) including a memory capacitance portion composed of a storage node, a cell plate, and a capacitance insulating film; a floating-gate EEPROM (Electrically Erasable and Programmable Read Only Memory) including a memory capacitance portion composed of a floating gate, a control gate, and a capacitance insulating film; and a capacitance element provided in an analog circuit.
FIG. 11 is a cross-sectional view of a conventional floating-gate EEPROM. As shown in the drawing, a tunnel insulating film 110, a floating gate electrode 111, a capacitance insulating film 112, and a control gate electrode 113 are provided on a semiconductor substrate 101. In the semiconductor substrate 101, a source region 108 and a drain region 109 are formed, to be self-aligned with the floating gate electrode 111 and the overlying components identified above. The floating gate electrode 111, the capacitance insulating film 112, and the control gate electrode 113 constitute a capacitive coupling portion. The capacitive coupling portion has the function of causing the injection of electrons into the floating gate electrode 111 having its capacitance coupled with the capacitance of the control gate electrode 113 or the withdrawal of electrons therefrom by the application of a control voltage to the control electrode 113.
In a semiconductor device including such a capacitance portion having a capacitance insulating film, a single-layer silicon oxide film, a silicon nitride film with a high dielectric constant, or the like is used as the capacitance insulating film. The capacitance insulating film 112 shown in FIG. 11 is typically an insulating film containing silicon nitride such as a silicon-nitride/silicon-oxide two-layer film (ON film) and a silicon-oxide/silicon-nitride/siliconoxide three-layer film (ONO film). An oxynitride film has also been employed in a MOS transistor in particular.
On the other hand, the two conductive layers are normally two high-melting-point polysilicon films. For example, the floating gate electrode 111 and the control electrode 113 of the EEPROM shown in FIG. 11 are typically composed of polysilicon.
In recent years, as higher integration has been achieved in a semiconductor integrated circuit, further miniaturization and reduction of an operating voltage have been required for semiconductor devices including the above-mentioned capacitance portion. Lately, there has been an increasing demand for a semiconductor device with a capacitance portion having a typical size of 0.5 m (half-micron) or less. Consequently, each of the gate electrodes 111 and 112 shown in FIG. 11 tends to have a further reduced gate length.
However, if the lateral sizes of conductive layers overlying and underlying an electrostatic capacitance portion in a semiconductor device with a half-micron or smaller capacitance portion or the lateral sizes of the floating gate electrode and the control gate electrode in a floating-gate semiconductor memory device are adjusted at 0.5 xcexcm or less, then the thickness of the capacitance insulating film 112 shown in FIG. 11 is likely to be nonuniform and have a larger thickness at both end portions thereof. The electrostatic capacitance between the floating gate electrode 111 and the control gate electrode 113 is reduced accordingly, which makes it difficult to provide a specified value of capacitance necessary to secure inherent properties. Such a nonuniform film thickness may be caused as follows.
Normally, the floating gate electrode 111, the capacitance insulating film 112 and the control gate electrode 113, which have been formed by patterning, are used as a mask, thereby implanting impurity ions into the semiconductor substrate 101 to form the source and drain regions 108 and 109. After the ion implantation, a heat treatment is performed in an oxidizing atmosphere at a high temperature of 800xc2x0 C. to 1000xc2x0 C. to activate the implanted impurity and thereby generate carriers. However, the heat treatment causes the phenomenon of the increased thickness at both ends of the capacitance insulating film 112. Specifically, when the capacitance insulating film 112 interposed between the control gate electrode 113 as the upper conductive layer and the floating gate electrode 111 as the lower conductive layer is oxidized rapidly from both side faces thereof in a half-micron or smaller capacitance portion, the capacitance insulating film 112 has remarkably different thicknesses at the central and peripheral portions thereof.
As a result of experiments, the present inventors found that oxidization is accelerated rapidly when each of the electrodes 111 and 113 is composed of polysilicon having a size of 0.4 xcexcm or less in the lateral or channel longitudinal direction. This may be attributed to the phenomenon of accelerated oxidization of the polysilicon films interposing the capacitance insulating film.
Thus, as a voltage applied to the control gate electrode 113 has been further reduced, it has become more and more difficult to secure a required capacitive coupling ratio for conventional floating-gate semiconductor memory devices. As a result, numerous problems, like deterioration of device characteristics, have been caused. For example, write/erase speed and the amount of read current are adversely decreased. Moreover, other types of semiconductor devices are also highly likely to cause various deficiencies in the characteristics thereof because of the deterioration in capacitance value of the capacitance portion thereof.
The present invention was made in view of the above-described conventional problems. An object of the present invention is to provide a semiconductor device including a capacitance portion having a capacitance insulating film with a more uniform thickness by adopting measures to suppress an increase in thickness of the capacitance insulating film at both end portions thereof even when the capacitance portion has a half-micron or smaller lateral dimension.
A first semiconductor device according to the present invention includes: a semiconductor substrate; a first conductive film provided over the semiconductor substrate; a dielectric film, which is provided on the first conductive film and contains an oxidizing material; a second conductive film provided on the dielectric film; a first spacer film composed of an oxide film covering respective side faces of the first conductive film, the dielectric film, and the second conductive film; and a second spacer film covering the first spacer film and having a function of preventing oxygen from passing therethrough.
In such a structure, the second spacer film having a function of preventing oxygen from passing therethrough suppresses the supply of oxygen to both end portions of the dielectric film and to the first and second conductive films adjacent thereto, even when the semiconductor device is subjected to a heat treatment in an oxygen atmosphere. Consequently, an increase in thickness of the dielectric film at both ends thereof is prevented and a decrease in capacitance between the first and second conductive films is suppressed. Even when the second spacer film has a relatively insufficient insulating function, since the first spacer film composed of the oxide film having a sufficient insulating function is provided, it is possible to prevent leakage current from being generated between the first and second conductive films.
The first semiconductor device may be a nonvolatile semiconductor memory device including: a gate insulating film provided on the semiconductor substrate; a floating gate electrode provided on the gate insulating film; a capacitance insulating film provided on the floating gate electrode; and a control gate electrode provided on the capacitance insulating film. The first conductive film may be the floating gate electrode, the dielectric film may be the capacitance insulating film, and the second conductive film may be the control gate electrode.
As a result, a semiconductor device, operating with a low voltage and performing high-speed write and erase operations as a floating-gate semiconductor memory device with a high capacitive coupling ratio, is realized.
The first semiconductor device may further include a conductor protect film provided on the second conductive film and the first spacer film may extend to cover a side face of the conductor protect film.
If the conductor protect film is an oxide film in the first semiconductor device, the first spacer film preferably has an upper end lower in level than a top face of the conductor protect film.
Thus, it is possible to minimize the contact area between the conductor protect film and the first spacer film each composed of the oxide film. Consequently, the amount of oxygen supplied to the dielectric film via the conductor protect film and the first spacer film can be suppressed in the step of thermally treating the semiconductor device in an oxidizing atmosphere, which suppresses an increase in thickness of both end portions of the dielectric film.
In the first semiconductor device, if the conductor protect film is constituted by a first conductor protect film composed of an oxide film and a second conductor protect film, which is provided on the first conductor protect film and has a function of preventing oxygen from passing therethrough, the first spacer film preferably extends to cover respective side faces of the first and second conductor protect films.
In such a case, the oxide films are not exposed on the surface. Therefore, even if the first conductor protect film and the first spacer film, each composed of an oxide film, has a large contact area therebetween, the amount of oxygen supplied to the dielectric film via the conductor protect film and the first spacer film can be reduced with more certainty during the heat treatment process of the semiconductor device in an oxidizing atmosphere. As a result, it is possible to suppress an increase in thickness of the dielectric film at both end portions thereof.
In the first semiconductor device, the second spacer film may be a film containing silicon nitride.
In the first semiconductor device, the first and second spacer films may be provided to cover a top face and both side faces of a structure constituted by the first conductive film, the dielectric film, and the second conductive film.
In the first semiconductor device, the second spacer film may contain oxynitride.
A second semiconductor device according to the present invention includes: a semiconductor substrate; a gate insulating film provided on the semiconductor substrate; a floating gate electrode provided on the gate insulating film; a capacitance insulating film composed of a dielectric film provided on the floating gate electrode; a control gate electrode formed on the capacitance insulating film; a tunnel insulating film formed on a side face of the floating gate electrode or over a side face and a part of a top face of the floating gate electrode; an erasing gate electrode opposed to the floating gate electrode via the tunnel insulating film; and a spacer film provided over respective side faces of the control gate electrode and the capacitance insulating film and having a function of preventing oxygen from passing therethrough.
In such a structure, both end portions of the capacitance insulating film are covered with the spacer films during the heat treatment performed in an oxidizing atmosphere required to form the tunnel insulating film composed of the oxide film interposed between the erasing gate electrode and the floating gate electrode. Thus, it is possible to suppress an increase in thickness of the capacitance insulating film at both end portions thereof. As a result, a semiconductor device, operating with a low voltage and performing high-speed write and erase operations as a floating-gate semiconductor memory device with an erasing gate electrode having a high capacitive coupling ratio, can be obtained.
In the second semiconductor device, if the spacer film is composed of a first spacer film provided over the control gate electrode and the dielectric film and a second spacer film provided on the first spacer film, it is sufficient for at least one of the first and second spacer films to have a function of preventing oxygen from passing therethrough.
If the first spacer film is an oxide film in the second semiconductor device, it is sufficient for the second spacer film to have a function of preventing oxygen from passing therethrough.
If the second semiconductor device further includes a conductor protect film on the control gate electrode, the first spacer film preferably extends to cover a side face of the conductor protect film.
If the conductor protect film is an oxide film in the second semiconductor device, the first spacer film has preferably an upper end lower in level than a top face of the conductor protect film.
In the second semiconductor device, if the conductor protect film is constituted by a first conductor protect film composed of an oxide film and a second conductor protect film provided on the first conductor protect film and having a function of preventing oxygen from passing therethrough, the first spacer film preferably extends to cover respective side faces of the first and second conductor protect films.
In the second semiconductor device, the second spacer film may contain oxynitride.
In the second semiconductor device, the spacer film may be provided to cover a top face and a side face of a structure constituted by the control gate electrode and the capacitance insulating film.
A method of manufacturing a semiconductor device according to the present invention includes: a first step of forming a first conductive film over a semiconductor substrate; a second step of forming a dielectric film on the first conductive film; a third step of forming a second conductive film on the dielectric film; and a fourth step of forming a spacer film containing at least silicon nitride over at least respective side faces of the dielectric film and the second conductive film.
The method can suppress an increase in thickness of the dielectric film at both end portions thereof since the spacer film containing silicon nitride having a superior function of preventing oxygen from passing therethrough is formed in the fourth step.
The method of manufacturing a semiconductor device may further include the step of forming a gate insulating film on the semiconductor substrate prior to the first step. The first to third steps may include sequentially stacking a conductive film for a floating gate electrode, an insulating film for a capacitance insulating film, and a conductive film for a control gate electrode and patterning each of the films to form the floating gate electrode as the first conductive film, the capacitance insulating film as the dielectric film, and the control gate electrode as the second conductive film. The fourth step may include forming the spacer film over respective side faces of the control gate electrode, the capacitance insulating film, and the floating gate posterior to the third step.
In accordance with this method, the first semiconductor device can be formed.
Alternatively, the method of manufacturing a semiconductor device may further include the step of forming a gate insulating film on the semiconductor substrate prior to the first step. The first and second steps may include sequentially stacking a conductive film for a floating gate electrode, an insulating film for a capacitance insulating film, and a conductive film for a control gate electrode and patterning the conductive film for the control gate electrode and the insulating film for the capacitance insulating film to form the control gate electrode as the second conductive film and the capacitance insulating film as the dielectric film. The fourth step may include forming the spacer film over respective side faces of the control gate electrode and the capacitance insulating film. The third step may include patterning the conductive film for the floating gate electrode by using the control gate electrode and the capacitance insulating film as a mask to form the floating gate electrode as the first conductive film having an exposed side face posterior to the fourth step. The method may further include the steps of: thermally oxidizing the exposed side face of the floating gate electrode to form a tunnel insulating film composed of an oxide film posterior to the third step; and forming an erasing gate electrode opposed to the floating gate electrode via the tunnel insulating film.
In accordance with this method, the second semiconductor device can be formed.
In the method of manufacturing a semiconductor device, the fourth step may include forming a spacer film composed of a single-layer silicon nitride film.
In the method of manufacturing a semiconductor device, the fourth step may include forming a spacer film including a multilayer film composed of a silicon nitride film and an oxide film.
In the method of manufacturing a semiconductor device, the fourth step may include forming the spacer film including an oxynitride film.